Why SPI-mode microSD tops out far below SD mode: the clock ceiling, per-block overhead, and what your MCU can realistically sustain.
TL;DR
In SPI mode a microSD card is read and written one bit at a time over a single data line, with a command-response handshake around every 512-byte block. That architecture sets the ceiling, not the card’s speed class.
At a 25 MHz SPI clock the raw bit rate is 25 Mbit/s, about 3.1 MB/s. At 50 MHz it is about 6.25 MB/s. Real throughput lands below those numbers once command overhead, busy waits and host gaps are counted — usually 60–85% of raw.
Speed class is defined on the SD-mode bus. A U3 or A2 rating tells you nothing about what your SPI host will see.
The two ceilings, and whichever is lower wins
The bus clock. SPI transfers one bit per clock edge. This is arithmetic you can do before you buy anything: clock ÷ 8 = bytes per second, then discount for overhead.
Per-block overhead. Every 512-byte read or write is bracketed by a command byte, address bytes, response bytes, a data token, CRC, and — for writes — a busy period while the card actually programs the page. At 512-byte transfers this is tolerable. At 16-byte transfers it is the whole story.
What you actually control
Four things, in order of impact:
- Block size. Always transfer whole 512-byte blocks. Single-byte or small-write APIs throw away most of the bus. Batch small records into a block-sized buffer in firmware before handing them to the driver.
- DMA instead of polling. At 25 MHz a polling loop is fine on a fast MCU and fatal on a slow one. If the host has a DMA channel, use it — otherwise the CPU becomes the bottleneck before the bus does.
- Clock rate. Push to the highest rate the card and the wiring tolerate. Long unshielded traces at 50 MHz produce errors that look like card failures.
- Read batching. Reads have no busy period, so sequential reads run much closer to the raw bus rate than writes do. If the design is read-heavy, SPI is far less painful than the numbers suggest.
When SPI is the wrong answer
SPI exists so a host without an SD/MMC controller can still talk to a card. That is a cost decision, not a performance decision. If the product needs more than single-digit MB/s, the interface is the thing to change — see microSD SPI mode vs SD mode: which interface to specify.
A practical threshold: firmware updates, log retrieval and photo storage are fine on SPI. Video recording and anything that streams more than a few MB/s of continuous data is not, and no amount of tuning will make it so.
What to put in the RFQ
If the design is committed to SPI, say so — and send the clock rate, the block size your driver uses, and whether the workload is read-heavy or write-heavy. A supplier quoting a card against “SPI, 25 MHz, 512-byte blocks, mostly reads” can tell you whether the card will keep up. A supplier quoting against “32 GB microSD” cannot.
Sources
Frequently asked questions
"Why is SPI mode so much slower than SD mode for the same card?"
"SPI mode moves one bit per clock edge on a single data line, while SD mode uses 1-bit or 4-bit parallel data lines. A card that reaches tens of MB/s in 4-bit SD mode at 50 MHz will, in SPI mode, be limited by the single-lane clock your host can generate plus per-block command overhead."
"What SPI clock can I actually run a microSD card at?"
"Most cards initialize safely at 400 kHz and accept higher clocks after initialization, but the reliable ceiling varies by card and by host. Many microcontrollers top out at 25–50 MHz SPI, and the card's own SPI timing must be respected. Always validate at temperature and voltage extremes for your specific card."
"Is SPI mode good enough for data logging?"
"For low-rate logging — sensor readings, event records, small configuration files — SPI mode is usually adequate. For continuous high-rate capture such as video or audio streaming, the sustained throughput and per-block overhead of SPI typically become the limiting factor."
"Can I switch a card from SPI mode back to SD mode at runtime?"
"SPI mode is entered by holding CS low during the first CMD0 after power-up. Once in SPI mode, the card stays there until the next power cycle. You cannot hot-switch a running card between SPI and SD mode without re-initializing."
"Does the card's speed class tell me what it will do in SPI mode?"
"No. UHS speed classes and A1/A2 ratings describe SD-mode performance. SPI mode does not use those bus modes, so a U3 or A2 card may still be limited by your SPI host clock and per-block overhead."