Where the days go in a custom flash order: tooling, fab, assembly and test

By WINTEL Engineering Team · Published 2026-10-03 · 8 min read

A custom flash order spends its weeks in tooling, chip supply, assembly and test. Where the calendar goes, which stages you control, and what shortens a run.

An SMT assembly line on the Wintel production floor placing components onto bare boards before COB bonding and test
Assembly is the short section of a custom order. It is also the only section a late drawing or a late artwork file will hold up.
In short

A custom flash order spends its weeks in four places, and only the middle two respond to urgency. Published tooling guidance puts aluminium tooling at 2-4 weeks from an approved drawing to T1 parts, steel at 4-8 weeks, so a drawing that slips by a week slips the whole calendar by a week. A chip that is not already bonded costs far more: wafer fabrication runs up to 12 weeks and assembly plus test adds 4-8 more, for a full fab-to-test cycle of roughly 26 weeks. Assembly, marking and outgoing test are the short sections. The longest number on any order is the one no quotation writes down.

The quotation says 30 days, so why does it take twelve weeks?

A buyer reads “lead time: 30 days” on a quotation and plans a product launch around it. The first shipment arrives late, and the conversation starts with both sides pointing at the same document.

The number on the quotation usually describes the short tail of the calendar. The long parts sit behind it, and many of them were decided before the order existed — at the drawing stage, and earlier still, at the chip selection stage.

This article walks the calendar of a custom flash order stage by stage: tooling, chip supply, assembly, and test. The timings come from published industry guidance for injection tooling and semiconductor supply, because those are the ranges the calendar is actually built on. We do not publish our own day counts per configuration. A number we cannot break down into stages is worse for you than no number, so we give you the structure instead.

Four long sections, and only two of them are yours

A custom order moves through four blocks, and they are not the same length.

Tooling comes first and it is measured in weeks. Chip supply runs next and it is measured in weeks, sometimes months. Assembly and test come last and they are measured in days. Most late deliveries are a tooling or a chip problem wearing a production delay as a disguise, which is why the correction belongs upstream.

Tooling: the week everyone remembers

Under published injection moulding guidance, aluminium tooling runs 2-4 weeks from an approved drawing to T1 samples. Steel runs 4-8 weeks. A complex multi-cavity tool runs 10-12 weeks. Those figures describe the industry and they apply with the same shape to a TF card shell, a UDP (USB Disk in Package) module housing or a semi-finished board carrier.

Two details in that same guidance decide who owns the risk. The tooling fee usually buys the exclusive right to have parts produced from that tool, not automatically the physical steel. Moving a tool to another factory needs a clear ownership clause plus a matched machine platen size and tonnage. If your programme expects the tool to be movable, that has to be written down before the fee is paid.

Then there is the change order. A simple engineering change after T1 adds 1-2 weeks. A major change — adding a side action to the tool, say — adds 3-5 weeks. That one sentence explains most of the late deliveries in this trade.

The chip is the longest number nobody writes down

Semiconductor supply carries the other end of the calendar. Wafer fabrication runs up to 12 weeks. Assembly and test add a further 4-8 weeks. The full cycle from fab through assembly to test is roughly 26 weeks, which is longer than most product launch schedules.

The practical consequence is that a chip which is not already bonded on a board in stock introduces a wait measured in a quarter rather than a month. A configuration built on pre-bonded parts skips the fab wait entirely and inherits only the tooling and assembly blocks. Buyers comparing the two on the total calendar are usually surprised by how much of the remaining time is identical in both.

Channel inventory explains why the wait moves rather than sitting fixed. Published benchmarks put unpackaged die banked upstream at about 180 days of supply and distributor holdings at about 65 days. When the channel is full, a well-placed order ships fast. When it is thin, the same order joins a queue that nobody can shorten by paying.

Reel quantities are not a commercial decision

A buyer who asks for 400 pieces of one component and receives a quotation for 1,000 is usually told that the supplier will not split a reel. That is closer to the truth than a commercial refusal.

Surface-mount parts ship on carrier tape reels sized under EIA-481 and IEC 60286-3, and the reel quantity follows from package size and tape pitch. Real counts for common parts: a 0402 chip resistor is 10,000 pieces on a 7-inch reel and 50,000 on a 13-inch; an SOIC-8 narrow body is 2,500; a SOT-23 3-lead part comes in 1,000 or 3,000. When the packaging standard sets the quantity, the factory does not get to choose, and the honest question is whether you can use the extra pieces or release them as a second batch.

Assembly is short, and still the easiest to hold up

Once the tool is cut and the chip is in hand, the visible work runs in days rather than weeks. Bare die or packaged parts go onto the board by COB bonding or SMT placement. A housing goes on. Marking follows — silk screen, colour print or laser engraving. Then capacity and read-write verification, then packaging.

That last block is where inspection sampling enters. Acceptance sampling follows ISO 2859-1 / ANSI-ASQ Z1.4, and General Inspection Level II is the default when a contract is silent. Common AQL assignments run critical at 0, major at 2.5 and minor at 4.0. AQL values are planning parameters, not a defect allowance. A buyer who reads “AQL 2.5” as permission to accept 2.5 percent bad units has misread the number in both directions.

Assembly gets held up for unglamorous reasons. A late artwork file blocks marking. A shell colour approved in week three instead of week one blocks the housing run. A silkscreen vector saved at 8-bit PNG resolution has to be redrawn before it can be printed on a line. None of these are delays in anyone’s process diagram, and together they account for days.

Where the calendar compresses

Five decisions move the end date, and four of them are yours before the order is placed.

Approve the drawing and the artwork in one pass, before tooling starts. A revision after the tool is cut is the expensive kind of fast.

Decide the interface at the PCB stage. Contact count, package type and bus mode are physical facts. Choosing USB 2.0 over USB 3.2 Gen 1x1 at the board stage is a decision; upgrading it later is replacement.

Name the chip state you are buying. A pre-bonded part and a fresh wafer lot produce different calendars, and the difference should be stated in the order.

Agree the reel split up front. If the packaging standard forces 2,500 pieces, decide in week one whether you take 2,500 or pay to split, not in week six.

Approve the T1 sample against a written acceptance list. A sample approved on a verbal “looks fine” comes back as a problem once the run is in the line.

The fifth sits with us: placing the material order when the drawing freezes, rather than after the sample is signed off. Suppliers who wait for approval to order silicon convert a slow approval into a slow delivery.

What our own published data carries

Our product data covers the formats we build and their physical dimensions: the TF card at 15 × 11 × 1 mm and 0.25 g from 4GB to 256GB, the UDP module at 11.3 × 24.8 × 1.45 mm and 0.819 g, and the semi-finished board at 12 × 44 × 4.5 mm and 3.2 g. Those are documented figures.

It does not publish a lead time per configuration. Different configurations consume different tooling, different chip states and different test times, and a single number would be accurate for nobody.

Every timing in the tooling and semiconductor sections above is published industry guidance for injection moulding and component supply. None of it is a measurement from our own floor, none of it is a commitment on an order placed with us, and none of it should be read as a delivery promise.

When you should not buy this from us

Three situations where the calendar argues for someone else.

If you need stock at short notice, we build in scheduled batches against confirmed configurations. We are not a warehouse, and an urgent top-up on a customised part will not beat the tooling block, which no amount of urgency shortens.

If your order is a single engineering sample of an off-the-shelf part with no custom housing and no artwork, a distributor or a spot-market seller will deliver faster. Tooling is not involved in that transaction, and we would be quoting you for process you do not need.

If you require a fixed delivery date in writing before the drawing is frozen, we cannot give it honestly. The long blocks are upstream of anything we control, and a supplier who commits to a date before the configuration exists is guessing with your launch schedule as the stake.

What to put in the order file

Four lines, asked before the quotation is returned.

Which stages the quoted lead time covers, tooling included or excluded. Which chip state the configuration uses — pre-bonded or fresh lot. The reel quantity the packaging standard forces, and who pays for a split. The acceptance list the first article is measured against.

A supplier who answers those four without volunteering a marketing number is describing a calendar. One who answers with a single figure and no stage list has moved the conversation from planning to reassurance, and this whole article is about the difference.

Frequently asked questions

Why does a quotation say 30 days when the order arrives in 12 weeks?

Because the figure on the quotation normally describes the tail of the calendar: assembly, marking and outgoing test. Tooling runs 2-4 weeks for aluminium and 4-8 weeks for steel before a single part exists, and a chip that is not already bonded can add 12 weeks or more. The quote is not wrong. It is describing the last fourth of the job. Ask which stages the number covers before you plan a launch around it.

Can I shorten the calendar by increasing the order quantity?

Sometimes, and not for the reason usually given. A larger single release lets a supplier place one material order instead of several, and one line changeover instead of many. It does not shorten tooling, and it does not shorten a fab wait if the chip has to be pulled from a wafer lot. Quantity compresses the repeat side of the calendar. It never compresses the first-part side.

What is the single biggest cause of a slipped delivery date?

An engineering change after the T1 sample. Published tooling guidance puts a simple change at 1-2 weeks added time and a major change, such as adding a side action to the tool, at 3-5 weeks. Those weeks sit behind the whole production run, so every day spent revising the drawing after tooling has started is a day removed from the end date. Freezing the drawing and the artwork before approval is the highest-value thing a buyer does.

Why can I only order a component in quantities of 1,000 or 3,000 pieces?

Because surface-mount parts ship on carrier tape reels sized by EIA-481 and IEC 60286-3, and the reel quantity is set by package size and tape pitch rather than by commercial policy. A 0402 chip resistor runs 10,000 pieces on a 7-inch reel and 50,000 on a 13-inch; an SOIC-8 narrow body is 2,500; a SOT-23 3-lead part comes in 1,000 or 3,000. You can pay for a split reel, but the split and its cost should be agreed before the order, not negotiated after placement.

Does a stock chip make a new configuration fast?

It makes the chip wait disappear, which is the largest single block. A configuration built on already-bonded parts still needs tooling, assembly and test, so expect the same tooling time and only the fab wait removed. Buyers who compare a stock-chip build against a fresh one on the total calendar are usually surprised by how much of the remaining time is unchanged.

How should I ask about lead time so the answer is useful?

Name the four stages separately: tooling, chip availability, assembly, and test. Ask which of them applies to your configuration and which figure is an industry range rather than a commitment. A supplier who answers with one number and no breakdown has moved the discussion from a calendar to a promise, and a promise without a stage list is the reason launch dates move.

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